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54VCXH162374
Rad hard low voltage CMOS 16-bit D-type Flip-Flop (3-state) with 3.6V tolerant inputs and outputs
Features

1.65 to 3.6V inputs and outputs High speed: - tPD = 3.4ns (Max) at VCC = 3.0 to 3.6V - tPD = 4.8ns (Max) at VCC = 2.3 to 2.7V Symmetrical impedance outputs: - |IOH| = IOL = 12mA (Min) at VCC = 3.0V - |IOH| = IOL = 8mA (Min) at VCC = 2.3V Power down protection on inputs and outputs 26 serie resistors in outputs Operating voltage range: - VCC(Opr) = 1.65V to 3.6V Pin and function compatible with 54 SERIES H162374 Bus hold provided on both sides Cold spare function Latch-up performance exceeds 300mA (JESD 17) ESD performance: - HBM > 2000V (MIL STD 883 method 3015); MM > 200V 300KRad Mil1019.6 Condition A, (RHA QML qualification extension undergone) No SEL, no SEU under 72 Mev/cm2/mg LET heavy ions irradiation QML qualified product Device fully compliant with DSCC SMD 5962-05212
Flat-48

Description
The 54VCXH162374 is a low voltage CMOS 16 bit d-type Flip-Flop with 3 state outputs non inverting fabricated with sub-micron silicon gate and five-layer metal wiring C2MOS technology. It is ideal for low power and very high speed 1.65 to 3.6V applications; it can be interfaced to 3.6V signal environment for both inputs and outputs. These 16 bit D-TYPE flip-flops are controlled by two clock inputs (nCK) and two output enable inputs (nOE). On the positive transition of the (nCK), the nQ outputs will be set to the logic state that were setup at the nD inputs. While the (nOE) input is low, the 8 outputs (nQ) will be in a normal state (HIGH or LOW logic level) and while high level the outputs will be in a high impedance state. Any output control does not affect the internal operation of flip flops; that is, the old data can be retained or the new data can be entered even while the outputs are OFF.

July 2007
Rev 4
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Contents
54VCXH162374
Contents
1 2 Logic symbols and I/O equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 2.2 2.3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Truth table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.1 Recommended operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 5 6 7 8 9
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Test circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
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54VCXH162374
Logic symbols and I/O equivalent circuit
1
Logic symbols and I/O equivalent circuit
Figure 1. IEC logic symbols
Figure 2.
Input and output equivalent circuit
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Logic symbols and I/O equivalent circuit
54VCXH162374
Figure 3.
Logic diagram
Note:
This logic diagram has not to be used to estimate propagation delays
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54VCXH162374
Pin settings
2
2.1
Pin settings
Pin connection
Figure 4. Pin connection (top through view)
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Pin settings
54VCXH162374
2.2
Pin description
Table 1. Pin description
Pin N 1 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 24 25 36, 35, 33, 32, 30, 29, 27, 26 47, 46, 44, 43, 41, 40, 38, 37 48 4, 10, 15, 21, 28, 34, 39, 45 7, 18, 31, 42 Symbol 1OE 1Q0 to 1Q7 2Q0 to 2Q7 2OE 2CK 2D0 to 2D7 1D0 to 1D7 1CK GND VCC Name and function 3 state output enable input (Active LOW) 3-state outputs 3-state outputs 3 state output enable input (Active LOW) Clock input Data inputs Data inputs Clock input Ground (0V) Positive supply voltage
2.3
Truth table
Table 2. Truth table
Inputs OE H L L L LE X D X X L H Output Q Z No change (1) L H
1. Q outputs are latched at the time when the LE input is taken low logic level.
Note:
X = Do not care; Z = High Impedance
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54VCXH162374
Maximum rating
3
Maximum rating
Stressing the device above the rating listed in the "Absolute Maximum Ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. Table 3. Absolute maximum ratings
Symbol VCC VI VO VO IIK IOK IO ICC or IGND PD Tstg TL Supply voltage DC input voltage DC output voltage (OFF State) DC output voltage (High or Low State) (1) DC input diode current DC output diode current (2) DC output current DC VCC or ground current per supply pin Power dissipation Storage temperature Lead temperature (10 sec) Parameter Value -0.5 to +4.6 -0.5 to +4.6 -0.5 to +4.6 -0.5 to VCC + 0.5 - 50 - 50 50 100 400 -65 to +150 260 Unit V V V V mA mA mA mA mW C C
1. IO absolute maximum rating must be observed 2. VO < GND, VO > VCC
3.1
Recommended operating conditions
Table 4. Recommended operating conditions
Symbol VCC VI VO VO IOH, IOL IOH, IOL Top dt/dv Supply voltage Input voltage Output voltage (OFF state) Output voltage (High or Low State) High or low level output current (VCC = 3.0 to 3.6V) High or low level output current (VCC = 2.3 to 2.7V) Operating temperature Input rise and fall time (1) Parameter Value 1.8 to 3.6 -0.3 to 3.6 0 to 3.6 0 to VCC 12 8 -55 to 125 0 to 10 Unit V V V V mA mA C ns/V
1. VIN from 0.8V to 2V at VCC = 3.0V
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Electrical characteristics
54VCXH162374
4
Electrical characteristics
Table 5. DC specifications (2.7V < VCC < 3.6V unless otherwise specified)
Test condition Symbol Parameter VCC (V) 2.7 to 3.6 Low level input voltage 2.7 to 3.6 VOH High level output voltage 2.7 3.0 2.7 to 3.6 VOL Low level output voltage 2.7 3.0 II Input leakage current 2.7 to 3.6 3.0 II(HOLD) Input hold current 3.6 Ioff IOZ Power Off leakage current High impedance output leakage current Quiescent supply current ICC incr. per Input 0 2.7 to 3.6 IO=-100 A IO=-6 mA IO=-8 mA IO=-12 mA IO=100 A IO=6 mA IO=8 mA IO=12 mA VI = 0 to 3.6V VI = 0.8V VI = 2V VI = 0 to 3.6V VI or VO = 0 to 3.6V VI = VIH or VIL VO = 0 to 3.6V VI = VCC or GND VI or VO = VCC to 3.6V 2.7 to 3.6 VIH = VCC - 0.6V 75 -75 500 10 10 20 20 750 A A A VCC-0.2 2.2 V 2.4 2.2 0.2 0.4 V 0.55 0.8 5 A 0.8 Value -55 to 125C Min 2.0 V Max Unit
VIH VIL
High level input voltage
ICC ICC
2.7 to 3.6
A A
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54VCXH162374
Electrical characteristics
Table 6. DC specifications (2.3V < VCC < 2.7V unless otherwise specified)
Test condition Symbol VIH VIL Parameter High level input voltage 2.3 to 2.7 Low level input voltage 2.3 to 2.7 VOH High level output voltage 2.3 IO=-100 A IO=-4 mA IO=-6 mA IO=-8 mA 2.3 to 2.7 VOL Low level output voltage 2.3 Input leakage current 2.3 to 2.7 2.3 0 2.3 to 2.7 IO=100 A IO=6 mA IO=8 mA VI = VCC or GND VI = 0.7V VI = 1.7V VI or VO = 0 to 3.6V VI = VIH or VIL VO = 0 to 3.6V VI = VCC or GND VI or VO = VCC to 3.6V 45 -45 10 10 20 20 VCC-0.2 2.0 V 1.8 1.7 0.2 0.4 0.6 5 A A A A A V 0.7 VCC (V) Min 1.6 V Value -55 to 125 C Max Unit
II
II(HOLD) Input hold current Ioff IOZ ICC Power Off leakage current High impedance output leakage current Quixent
2.3 to 2.7
Table 7. Dynamic switching characteristics (TA = 25C, Input tr = tf = 2.0ns, CL = 30pF, RL = 500)
Test condition Symbol Parameter VCC (V) 2.5 3.3 2.5 3.3 2.5 3.3 VIL = 0V VIH = VCC VIL = 0V VIH = VCC VIL = 0V VIH = VCC Value TA = 25 C Min Typ 0.25 V 0.35 -0.25 V -0.35 2.05 V 2.65 Max Unit
VOLV
Dynamic valley low voltage quiet output (1) (2) Dynamic valley high voltage quiet output (2) (3) Dynamic valley high voltage quiet output (2) (3)
VOHV
VOHV
1. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the LOW state. 2. Parameters guaranteed by design. 3. Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is measured in the HIGH state.
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Electrical characteristics
54VCXH162374
Table 8. AC electrical characteristics (CL = 30pF, RL = 500, Input tr = tf = 2.0ns)
Test condition Symbol Parameter VCC (V) 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 Output enable time 3.0 to 3.6 2.3 to 2.7 Output disable time 3.0 to 3.6 Setup tIme, HIGH or LOW level Dn to LE Hold time High or LOW level Dn to LE LE pulse width, HIGH 3.0 to 3.6 Output to output skew time (1) (2) 2.3 to 2.7 3.0 to 3.6 235 0.5 ns 0.5 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 3.0 to 3.6 2.3 to 2.7 1.0 1.5 ns 1.5 1.5 ns 1.5 190 ns 0.8 1.0 ns 4.6 Value -55 to 125 C Min 1.0 0.8 1.0 0.8 1.0 Max 5.5 ns 4.5 6.2 ns 4.5 5.1 ns Unit
tPLH tPHL
Propagation delay time Dn to Qn Propagation delay time LE to Qn
tPLH tPHL
tPZL tPZH
tPLZ tPHZ
ts
th
tw
tOSLH tOSHL
1. Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switching in the same direction, either HIGH or LOW (tOSLH = | tPLHm - tPLHn|, tOSHL = | tPHLm - tPHLn|) 2. Parameter guaranteed by design
Table 9. Capacitive characteristics
Test condition Symbol Parameter VCC (V) 2.5 or 3.3 2.5 or 3.3 2.5 or 3.3 VIN = 0 or VCC VIN = 0 or VCC fIN = 10MHz VIN = 0 or VCC Value TA = 25 C Min Typ 6 7 20 Max pF pF pF Unit
CIN COUT CPD
Input capacitance Output capacitance Power dissipation capacitance (1)
1. CPD is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per circuit)
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54VCXH162374
Test circuit
5
Test circuit
Figure 5. Test circuit
Table 10. Test circuit
Test tPLH, tPHL tPZL, tPLZ (VCC = 3.0 to 3.6V) tPZL, tPLZ (VCC = 2.3 to 2.7V) tPZH, tPHZ Switch Open 6V 2VCC GND
CL = 30pF or equivalent (includes jig and probe capacitance) RL = R1 = 500 or equivalent RT = ZOUT of pulse generator (typically 50)
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Waveforms
54VCXH162374
6
Waveforms
Table 11. Waveform symbol value
Symbol 3.0 to 3.6V VIH VM VX VY 2.7V 1.5V VOL +0.3V VOH -0.3V VCC 2.3 to 2.7V VCC VCC/2 VOL +0.15V VOH -0.15V
Figure 6.
Waveform - nCK TO Qn propagation delays, nCK maximum frequency, Dn TO nCK setup and hold times (f = 1MHz; 50% duty cycle)
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54VCXH162374 Figure 7.
Waveforms Waveform - output enable and disable time (f = 1MHz; 50% duty cycle)
Figure 8.
Waveform - nCK minimum pulse width (f = 1MHz; 50% duty cycle)
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Package mechanical data
54VCXH162374
7
Package mechanical data
54VCXH162374 Products are supplied into ceramic body / metal lid hermetic Flat 48-pin space package Table 12. Flat-48 (MIL-STD-1835) mechanical data
Dim. A b c D E E2 E3 e f L Q S1 6.85 0.66 0.25 mm Min 2.18 0.20 0.12 15.57 9.52 6.22 1.52 Typ 2.47 0.254 0.15 15.75 9.65 6.35 1.65 0.635 0.20 8.38 0.79 0.43 9.40 0.92 0.61 0.270 0.026 0.010 Max 2.72 0.30 0.18 15.92 9.78 6.48 1.78 Min 0.086 0.008 0.005 0.613 0.375 0.245 0.060 inch Typ 0.097 0.010 0.006 0.620 0.380 0.250 0.065 0.025 0.008 0.330 0.031 0.017 0.370 0.036 0.024 Max 0.107 0.012 0.007 0.627 0.385 0.255 0.070
Figure 9.
Package dimension
7330585B 14/17
54VCXH162374
Order code
8
Order code
Table 13. Order code
Flight model Package Lead finish Gold Flat-48 Gold Solder dip Radiation level QML-V 300kRad 100kRad 100kRad RHFXH162374K-01V RHRXH162374K-01V RHRXH162374K-02V QML-Q RHFXH162374K-01Q RHRXH162374K-01Q RHRXH162374K-02Q Engineering model RHRXH162374K1 RHRXH162374 K1 Use the above one
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Revision history
54VCXH162374
9
Revision history
Table 14. Revision history
Date 09-Jul-2004 17-May-2005 19-Jun-2006 30-Jul-2007 Revision 1 2 3 4 First release. SMD qualified. 300Krad bullet updated, new template, mechanical data updated Typo in Table 12 on page 14. Changes
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54VCXH162374
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